CLEANLINESS OF A CLEAN ROOM

When people designing for a product that is going to be used in the clean room environment, one thing that must be put into consideration is how to let the product itself has a very little of contamination. This is very important because when the product attracts contamination, it will affecting the end product of chip production, i.e.: contaminating the wafer which resulting in defects thus yield lost.

First of all, one might want to understand how the clean room being classified. So below (taken from wikipedia), you may find that the cleanliness of a clean room is segmented into how many contamination accepted in an area.

Normally the chip manufacturer will need to define the cleanliness of their fab by judging from the application they will use. The smaller the overlay, the cleaner they want to go. 

For example, in 2007 there is a news, Intel aimed to produce a 45nm chips, for this, they came up with a clean room class 1 in about 184,000 square feet, meaning that there is no more than particle measuring 0.5 micron or larger per cubic foot of air (hospital operating rooms are normally Class 10,000 only). 

To understand further about how the clean room works, here is a video from Youtube explaining about the clean room itself.

As shown in the video, one of the particle source is from human body itself, therefore, a clean room suit needs to be put on before people getting into the clean room. This is to keep the particle within the specification. 

Another post will be written particularly to discuss about how to treat a product before entering into the clean room. i.e.: material, design, classification of the cleanliness grade of a product.